Three-dimensional semiconductor devices (or semiconductor devices with a three-dimensional structure) formed of an Si (silicon) semiconductor material have been known in the art, as disclosed in JP-A-2006-203250. According to the technique disclosed in this patent publication, a three-dimensional semiconductor device is manufactured by the following steps: forming a semiconductor integrated circuit on a semiconductor substrate; forming an interlayer film over the substrate; forming an Si layer on the interlayer film; and forming another semiconductor integrated circuit on the Si layer. (Other prior art includes JP-A No. Hei 5-75018, 2000-150900, and 2003-179233.)
In manufacture of a three-dimensional semiconductor device, it is preferable that each semiconductor element formed in each semiconductor layer be accurately disposed at a desired location. It should be noted that the more semiconductor layers are formed, the more necessary it is to accurately determine and establish the positional relationship between the structures (or semiconductor elements) formed in these layers.
However, the above conventional method of forming a three-dimensional device structure first forms semiconductor elements on a semiconductor substrate and then forms an Si layer over the substrate, as described above. This means that the structure fabricated on the substrate is covered with the formed Si layer, thereby preventing accurate measurement of the position of the structure. As a result, it is difficult to accurately determine and establish the positional relationship between the structures formed in the semiconductor layers of the semiconductor device.
To circumvent this problem, after the step of fabricating semiconductor elements in the Si layer (formed on the substrate), the portions of the Si layer not forming these elements may be removed by a patterning technique to allow the semiconductor elements on the substrate to be viewed. However, this requires an additional process step(s).